|  | 
| 
 Defines | 
| #define | DBGU_CR   (DBGU_BASE + US_CR_OFF) | 
|  | DBGU control register address. 
 | 
| #define | DBGU_MR   (DBGU_BASE + US_MR_OFF) | 
|  | DBGU mode register address. 
 | 
| #define | DBGU_IER   (DBGU_BASE + US_IER_OFF) | 
|  | DBGU interrupt enable register address. 
 | 
| #define | DBGU_IDR   (DBGU_BASE + US_IDR_OFF) | 
|  | DBGU interrupt disable register address. 
 | 
| #define | DBGU_IMR   (DBGU_BASE + US_IMR_OFF) | 
|  | DBGU interrupt mask register address. 
 | 
| #define | DBGU_SR   (DBGU_BASE + US_CSR_OFF) | 
|  | DBGU status register address. 
 | 
| #define | DBGU_RHR   (DBGU_BASE + US_RHR_OFF) | 
|  | DBGU receiver holding register address. 
 | 
| #define | DBGU_THR   (DBGU_BASE + US_THR_OFF) | 
|  | DBGU transmitter holding register address. 
 | 
| #define | DBGU_BRGR   (DBGU_BASE + US_BRGR_OFF) | 
|  | DBGU baud rate register address. 
 | 
| #define | DBGU_CIDR_OFF   0x00000040 | 
|  | DBGU chip ID register offset. 
 | 
| #define | DBGU_CIDR   (DBGU_BASE + DBGU_CIDR_OFF) | 
|  | DBGU chip ID register. 
 | 
| #define | DBGU_EXID_OFF   0x00000044 | 
|  | DBGU chip ID extension register offset. 
 | 
| #define | DBGU_EXID   (DBGU_BASE + DBGU_EXID_OFF) | 
|  | DBGU chip ID extension register. 
 | 
| #define | DBGU_FNR_OFF   0x00000048 | 
|  | DBGU force NTRST register offset. 
 | 
| #define | DBGU_FNR   (DBGU_BASE + DBGU_FNR_OFF) | 
|  | DBGU force NTRST register. 
 |