This file collects all port specifications for the AVR platform and provides an overview of hardware resources in use.
Values are geared to the Ethernut reference design and can be changed by the Configurator. This program creates a file with the same name in the build tree, which replaces this placeholder.
Defines | |
#define | UART0_RTS_AVRPORT AVRPORTE |
USART settings. | |
#define | UART1_RTS_AVRPORT AVRPORTE |
#define | RTL_BASE_ADDR 0x8300 |
Settings for the Realtek RTL8019AS. Memory mapped base address. | |
#define | RTL_SIGNAL_IRQ INT5 |
Interrupt used by the controller. | |
#define | RTL_EESK_BIT 5 |
Clock input for EEPROM emulation. | |
#define | RTL_EESK_AVRPORT AVRPORTC |
#define | RTL_EEDO_BIT 6 |
#define | RTL_EEDO_AVRPORT AVRPORTC |
#define | RTL_EEMU_BIT 7 |
#define | RTL_EEMU_AVRPORT AVRPORTC |
#define | SPIDIGIO_SOUT_BIT 5 |
Port usage of digital I/O shift register. | |
#define | SPIDIGIO_SOUT_AVRPORT AVRPORTD |
#define | SPIDIGIO_SIN_BIT 6 |
#define | SPIDIGIO_SIN_PIN PIND |
#define | SPIDIGIO_SIN_PORT PORTD |
#define | SPIDIGIO_SIN_DDR DDRD |
#define | SPIDIGIO_SCLK_BIT 7 |
#define | SPIDIGIO_SCLK_AVRPORT AVRPORTD |
#define | SPIDIGIO_LDI_BIT 7 |
#define | SPIDIGIO_LDI_AVRPORT AVRPORTB |
#define | SPIDIGIO_LDO_BIT 5 |
#define | SPIDIGIO_LDO_AVRPORT AVRPORTB |
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Clock input for EEPROM emulation. This is enabled by default, but the driver will run a check before jumping into the emulation. |