|
Collaboration diagram for Power Saving:
|
|
The Power-saving feature optimizes power consumption, enabling the software to stop the CPU clock and restarting it on interrupts or on reset. Also, the on-chip peripheral clocks can be enabled or disabled individually.
PS Control Register | |
| #define | PS_CR (PS_BASE + 0x00) |
| Register address. | |
Peripheral Clock Control Registers | |
| #define | PS_PCER (PS_BASE + 0x04) |
| Peripheral clock enable register address. | |
| #define | PS_PCDR (PS_BASE + 0x08) |
| Peripheral clock disable register address. | |
| #define | PS_PCSR (PS_BASE + 0x0C) |
| Peripheral clock status register address. | |
|
|
Register address. This register allows to stop the CPU clock. The clock is automatically enabled after reset and by any interrupt. |